Southern Europe Advanced FPGA Design and Verification Seminars

Time to Innovate: Get more into and out of your FPGA with Synopsys

Who should attend?
Advanced FPGA designers and project leaders.

What will you learn?
This half-day educational seminar on Advanced FPGA Design and Verification will take place at seven venues throughout Belgium, France and Spain during March and April. You will learn how to adopt more powerful, more productive and more predictable FPGA design and verification techniques, whether you use FPGA in your final product or only for ASIC prototyping.

The seminar will introduce Synopsys tools for advanced FPGA users, including model-based DSP algorithmic design, IP integration tools, tightly coupled constraint and analysis environments, integrated synthesis and placement, and on-board Assertion-based Verification linked to RTL simulation.

Seminar Agenda