Synopsys at IP ESC 2009

December 1 - 3, 2009 World Trade Center 5 place Robert Schuman 38 000 Grenoble FRANCE IP ESC 2009 website

Conference and exhibition
Tuesday, December 1 – Thursday, December 3
(Tuesday – IP Day, Wednesday – SoC Day, Thursday – Embedded Systems Day)

Synopsys Booth # 48

Visit the Synopsys booth to learn how our DesignWare® IP portfolio and solutions for FPGA implementation, rapid prototyping and virtual platforms are jointly improving your design and verification productivity.

See demonstrations in the Synopsys booth showing:

• HAPS boards and CHIPit systems, the key components of the Confirma Hardware-assisted verification platforms. FPGA-based prototyping has never been easier.
• DesignWare System-Level Library is the world’s largest tool-independent model library, with more than 100 SystemC TLM-2.0 compliant models. Used with Innovator virtual platforms it enables rapid development of most complex platforms, 9-12 months prior to silicon.
• System Prototyping combining the advantages of hardware based and virtual prototyping.
• DesignWare IP product videos:
• The proven interoperability between Texas Instrument’s USB 3.0 transceiver and Synopsys’ DesignWare USB 3.0 host and device controllers transferring data at 5 Gb/s.
• The DesignWare PHY and controller IP solutions for PCI Express 2.0 operating in a single lane configuration at 5 GT/s.
• Actual test equipment and custom boards developed and used by Synopsys to verify the DesignWare DDR IP. See full speed write and read data eyes, at speed functionality testing, duty cycle and phase error tests and jitter analysis results.
• Hardware demonstrations showing interoperability of the DesignWare SATA AHCI Host, Device, PHY and 6 Gb/s IP solutions.

Synopsys Activities at IP ESC 2009

Papers

• "Implementing Different Power Features in an IP", Sayandeep Nag
• "Low Power Verification of Connectivity IP cores A USB HS-OTG case study", Sriram Balasubramanian
• "Improving Software Development and Verification Productivity Using Intellectual Property (IP) Based System Prototyping", Markus Willems
• "Accelerating the development of TLM-2.0 models using MAK's", Markus Willems

Full event schedule